The Senior Signal Integrity Engineer at General Motors plays a crucial role in ensuring the performance and reliability of high-speed hardware designs within the ECU Electrical team. This position involves analyzing and mitigating signal degradation issues, collaborating with cross-functional teams, and optimizing design processes to support the development of next-generation automotive systems. The engineer will lead product development and integration activities, focusing on in-vehicle electronics and cutting-edge technologies.
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Perform detailed signal integrity (SI) simulations using tools such as HyperLynx, HFSS, or CST to identify and resolve issues related to crosstalk, signal loss, reflections, and other performance degradations in high-speed designs.
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Analyze PCB layout designs to ensure optimal signal performance, providing feedback and recommendations to layout and hardware design teams.
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Collaborate with hardware engineers to optimize high-speed signal paths, ensuring adherence to specifications for interfaces like DDR, PCIe, USB, SerDes, and Ethernet.
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Evaluate and validate signal integrity for power delivery networks (PDN) to minimize noise, ground bounce, and power/ground integrity issues.
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Work closely with PCB layout, hardware, and mechanical teams to ensure design choices align with signal integrity best practices.
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Partner with systems engineering and software teams to ensure signal integrity across the entire product stack, from silicon to system integration.
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Develop and implement test strategies for verifying signal integrity on prototypes and final products using tools like oscilloscopes, vector network analyzers (VNA), and time domain reflectometry (TDR).
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Create and maintain signal integrity design guidelines, best practices, and checklists to support hardware engineers throughout the product development lifecycle.
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Lead the evaluation of new materials, design techniques, and tools that enhance signal integrity, proposing innovations that improve overall system performance.
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Diagnose and resolve SI issues during the bring-up phase of new products, ensuring minimal impact on time-to-market.
